Cfxtrjtrk

we are using MAX14830(SPI to QUAD Uart). MAX14830 IC is connected to SPI1 of beaglebone black.

We have enabled the driver in the Linux and written DTS for max14830.

in dmesg ttyMAX0-3 if comming but in /dev it is not showing

[ 19.787878] spi2.0: ttyMAX0 at I/O 0x0 (irq = 102, base_baud = 230400) is a MAX14830

[ 19.828950] serial serial0: tty port ttyMAX0 registered

[ 19.879495] spi2.0: ttyMAX1 at I/O 0x20 (irq = 102, base_baud = 230400) is a MAX14830

[ 19.901608] serial serial1: tty port ttyMAX1 registered

[ 19.927662] spi2.0: ttyMAX2 at I/O 0x40 (irq = 102, base_baud = 230400) is a MAX14830

[ 19.987868] serial serial2: tty port ttyMAX2 registered

[ 19.999012] spi2.0: ttyMAX3 at I/O 0x60 (irq = 102, base_baud = 230400) is a MAX14830

[ 20.000769] serial serial3: tty port ttyMAX3 registered

DTS

/dts-v1/;

/plugin/;





/ {

compatible = "ti,beaglebone", "ti,beaglebone-black";

part-number = "BB-MAX14830-01";



/* state the resources this cape uses */

exclusive-use =

/* the pin header uses */

"P8.42", /* spi irq: gpio2_11 */

"P9.31", /* spi: spi1_sclk */

"P9.29", /* spi: spi1_d0 */

"P9.30", /* spi: spi1_d1 */

"P9.28", /* spi: spi1_cs0 */

/* the hardware IP uses */

"gpio2_11",

"spi1";



fragment@0 {

target = <&am33xx_pinmux>;

__overlay__ {

bone_14830_spi1_pins: pinmux_bone_14830_spi1_pins {

pinctrl-single,pins = <

0x190 0x33 /* mcasp0_aclkx.spi1_sclk, OUTPUT_PULLUP | MODE3 */

0x194 0x33 /* mcasp0_fsx.spi1_d0, RX_ENABLED | PULLUP | MODE3 */

0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */

0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */

>;

};



bone_14830_pins: pinmux_bone_14830_pins {

pinctrl-single,pins = <

0x0b4 0x37 /* mcasp0_ahclkx.gpio2_11 P8_42, RX_ENABLED | PULLUP | MODE7 */

>;

};

};

};



fragment@1 {

target = <&spi1>;

__overlay__ {

#address-cells = <1>;

#size-cells = <0>;

status = "okay";

pinctrl-names = "default";

pinctrl-0 = <&bone_14830_spi1_pins>;

max14830@0 {

compatible = "maxim,max14830";

reg = <0>; /* cs0 */

mode=<0>;

spi-max-frequency=<16000000>;



pinctrl-names="default";

pinctrl-0 = <&bone_14830_pins>;

clocks=<&clk4m>;

clock-names="osc";

interrupt-parent = <&gpio2>;

interrupts = <11 2>; // Edge Falling

gpio-controller;

#gpio-cells = <2>;



clk4m: clk4m@10 {

compatible = "fixed-clock";

#clock-cells = <0>;

clock-frequency = <3686400>;

};

};

};

};

};

Any changes have to be done?